A typical active matrix liquid crystal display (LCD) includes an array of pixels such as the one shown in FIG. 1. Each pixel includes two transistors 8 and 10, a storage capacitor 16 and a liquid crystal (LC) cell 14. To write a data voltage to the pixel, the GL input is raised to a high state and a data voltage is driven on the SL input. The data voltage passes into the pixel via transistors 8 and 10, and is subsequently held on the pixel storage node 12 when the GL input is set to a low state. The voltage held on the pixel storage node is referred to as the pixel voltage, and controls the state of the LC cell and therefore the brightness of the pixel.
Such pixels, however, are not perfect: the transistors 8 and 10 exhibit a leakage current when in the off state. This leakage current results in a degradation of the pixel voltage over time. To address this problem, the display data is rewritten to the pixel to minimise image deterioration during the hold time. A frame refresh rate of 60 Hz is typical. This constant refreshing of the display results in significant power consumption, in particular because the column electrodes connecting the data to the SL input of each pixel must be repeatedly charged. One approach to reducing this power consumption is to reduce the frame refresh rate. Frame rate reduction is only possible if the degradation of the pixel electrode voltage is reduced. The pixel voltage degradation can be reduced by either increasing the size of the storage capacitor or reducing the leakage current. A larger storage capacitor is not desirable since it would result in increased pixel area and would increase the time taken to charge the pixel during data writing. Thus, the preferred approach to reducing the frame refresh rate is to reduce the leakage current.
Japanese laid-open patent application No. 5-142573 (Sato, Nov. 22, 1991) and U.S. Pat. No. 6,064,362 (Brownlow, May 16, 2000) and U.S. Pat. No. 7,573,451 (Tobita, Aug. 11, 2009) disclose different implementations of a technique to reduce the deterioration of the pixel voltage. This technique involves “boot strapping”: a unity gain voltage gain amplifier has its input connected to the pixel storage node 12 and its output connected to the junction between transistors 8 and 10, causing the pixel electrode voltage to appear at the junction of the series connected transistors 8 and 10. If the buffer amplifier were ideal and drew no charge from the pixel storage node 12, leakage from the pixel storage node 12 would be eliminated since the drain to source voltage of transistor 10 would be reduced to zero volts.
In the case of an LCD, the polarity of the voltage across the liquid crystal 14 must be inverted periodically. This prevents degradation of the LC material. In a 60 Hz display, the data driver typically inverts the voltage for each pixel each time it is written. Inversion may be implemented either by keeping the common electrode voltage, VCOM, constant and changing the voltage written to the pixel storage node (known as dc VCOM drive), or by changing the voltage applied to VCOM and changing the voltage written to the pixel storage node by a smaller amount (ac VCOM drive). In either case, the potential difference between the pixel storage node and VCOM should be the same absolute value but opposite polarity on alternate inversion cycles.
It is desirable to perform inversion of the LC voltage inside the pixels. To invert the data from the driver requires the column electrodes to be charged as well as the pixel capacitance. This consumes more power than in-pixel inversion, so it is undesirable in a battery-powered system.
None of the preceding prior art discloses a means for inverting the stored data inside the pixels. Instead, the data driver must write new, inverted data at an appropriate rate to prevent LC degradation.
U.S. Pat. No. 6,897,843 (Ayres, May 24, 2005) and US patent applications 2009/0002582A1 (Sano, Jan. 1, 2009) and 2007/0182689A1 (Miyazawa, Aug. 9, 2007) disclose pixel circuits that can perform inversion of the stored data without new data being written from the driver circuit. The inversion operation also serves to refresh the pixel voltage. Neither circuit includes any means for preventing degradation of the pixel voltage between inversion operations. The inversion frequency is therefore set by the pixel leakage current, and cannot be reduced to reduce the power consumed by the pixels.
“Polarizer-free Reflective LCD Combined with Ultra Low-power Driving Technology”, Y. Asaoka et al., SID 09 Digest pp 395-8 (conference held May 31-Jun. 5, 2009), and U.S. Pat. No. 6,940,483 (Maeda, Sep. 6, 2005) both describe pixel circuits with separate memory and inversion parts. The memory part is formed from SRAM (static random access memory), a well-known type of electronic memory that does not suffer from leakage. As in US patent application 2007/0182689A1 (Miyazawa, Aug. 9, 2007), the LC voltage is inverted without inverting the stored data. An advantage of this circuit is that the stored data is held indefinitely without leakage, so the inversion rate can be reduced as far as the LC material will allow, reducing power consumption. However, an SRAM cell is formed from a relatively large number of transistors, which occupy a relatively large layout area. This restricts the maximum display resolution that can be achieved with this approach.